CHEN Jian-xin, WANG Wen-jing, YUAN Zhi-peng, ZHANG Chi. Analyze Noise of 5.8 GHz/0.18 μm CMOS Integrated Low Noise Amplifier[J]. Journal of Beijing University of Technology, 2006, 32(5): 396-399.
    Citation: CHEN Jian-xin, WANG Wen-jing, YUAN Zhi-peng, ZHANG Chi. Analyze Noise of 5.8 GHz/0.18 μm CMOS Integrated Low Noise Amplifier[J]. Journal of Beijing University of Technology, 2006, 32(5): 396-399.

    Analyze Noise of 5.8 GHz/0.18 μm CMOS Integrated Low Noise Amplifier

    • To optimize the post simulation result of 5.8 GHz low noise amplifiers(LNA), we analyzed the parasitic effect on gain and noise figure (NF). We took some measures in circuit design and layout design, which improved the post simulation result. The post simulation result is similar to pre simulation. In the simulation, we considered the effect of gate resistor and gate induced current noise. The LNA possesses a 13.7 dB gain with 1.6 dB NF and 8.3 mW. It reached the requirement of 802.11a. At last, we provided the layout and post simulation of the LNA.
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