双极功率集成器件的优化

    Optimization of the Power Bipolar Integrated Device

    • 摘要: 以400 V双极功率集成器件(由BJT与p-i-n二极管以反并联方式集成在同一个芯片上构成)为例,通过仿真和实测分析,建立起基本概念和物理图像,阐明了集成功率器件中横向寄生晶体管所带来的影响,以及主晶体管与内二极管的不同间距又如何影响寄生晶体管所起作用等问题.最后给出了主晶体管与内二极管间距的优化设计值.这些为理解问题进而设计出主晶体管与内二极管之间新的隔离措施奠定了理论基础.

       

      Abstract: Based on a 400 V power bipolar integrated device(BJT and a anti-parallel p-i-n diode integrated on the same chip) and through simulation and experimental test,some fundamental concepts and physical images were established concerning the influence of the parasitic lateral p-n-p transistor on the integrated device and the dependence of this influence on the distance between the main transistor and the internal diode.Finally,the optimized design of the above-mentioned distance was proposed.These provide a theoretical basis for understanding the issue and devising new methods to isolate the main transistor and the internal diode.

       

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