Abstract: To reduce performance degradation by fixed-point and make the timing synchronization algorithm in MIMO-OFDM system less complicated during FPGA implementation, sub-modules in individual timing synchronizing module were discussed, and the complexity of timing synchronization algorithm implementation with field programmable gate array (FPGA) was analyzed according to multiplying and adding times in unit time, and the relationship among multiple timing synchronizing modules was studied. An automatic bit-cutting method and two simplified implementation schemes for MIMO-OFDM system timing synchronization algorithm were brought forward. Statistics on resource occupation of such schemes in VirtexII-Pro series FPGA of Xilinx Company was given, while the schemes were verified on B3G TDD system hardware platform. The results shows that the simplified implementation schemes are applicable to hardware implementation of B3G TDD MIMO-OFDM system timing synchronization algorithm.